A New Kind Of Transistor
I just read an interesting article in NASA Techbriefs about a new kind of transistor called a Not Majority gate. It has three inputs and puts out a true signal if true inputs are not in the majority. In ordinary logic majority gates are not simple. A majority gate would take 32 transistors to make in conventional CMOS logic. A single transistor majority gate would greatly simplify the logic of a full adder by taking advantage of the ability of a majority gate to change from NAND to NOR logic by changing one input. The full adder in CMOS logic would take about twice as many gates and four times as many transistors vs. majority gate logic. Here is a nice explanation of Majority Gate transistor works, with an idealized view of how one is constructed.
Now all this is kind of esoteric (unless you are a bit head) so what is the good of it? It has the potential of shrinking and speeding up the logic part of microprocessors. A small advance (most silicon area these days is devoted to memory of one sort or another), but it will help. In addition it will help a lot in power consumption. With fewer gates switching for a given function, power losses will be lower.
If you are in a particularly geeky mood I have a nice article on High Frequency Transimpedance Amplifiers up at IEC Fusion Technology.
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3 comments:
What I know about processor design is not even enough to get you into trouble, but if this will shrink the real estate required for "divide" operations, I'm very excited.
One of the greatest limitations on what we can do with embedded control systems today is the length of time required to execute a divide (or the amount of money you have to pay for a fast divide operation).
Neil
Neil,
You are stuck with the divide problem.
I don't put them in any of my real time loops. Multiplies only and as few of them as possible.
Divide goes like this (very approximately there are a few other house keeping chores):
Subtract
If the result is negative add.
Adjust the partial results accordingly.
Shift
Go around once for each bit until done. There is no easy way to mechanize that because of the potential add back in the decision loop. There is no way you can break it down like a multiply and do segments of your word in parallel. Or in something like a Wallace Tree.
Each step must come in sequence.
Smaller faster adders means we can do better on multiplies.
Bummer.
There are situations in motor torque control (such as calculating slip in an induction motor, or eliminating the effects of DC bus ripple) where nothing will do but a divide. And it has to happen at the same rate as your (fast) current loop. Many eyeballs have looked at the problem, but we still use divides.
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